Appendix B
AArch32 UNPREDICTABLE Behaviors
The cases in which the Cortex‑A35 processor implementation diverges from the preferred behavior
described in Armv8 AArch32 UNPREDICTABLE behaviors.
It contains the following sections:
• B.1 Use of R15 by Instruction on page Appx-B-882.
• B.2 UNPREDICTABLE instructions within an IT Block on page Appx-B-883.
• B.3 Load/Store accesses crossing page boundaries on page Appx-B-884.
• B.4 Armv8 Debug UNPREDICTABLE behaviors on page Appx-B-885.
• B.5 Other UNPREDICTABLE behaviors on page Appx-B-889.
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Appx-B-881
Non-Confidential