C8.11 External Debug Peripheral Identification Register 2
The EDPIDR2 characteristics are:
Purpose
Provides information to identify an external debug component.
Usage constraints
This register is accessible as follows:
Off DLK OSLK EDAD SLK Default
- - - - - RO
Table C1-1 Conditions on external register access to debug registers on page C1-579 describes
the condition codes.
Configurations
The EDPIDR2 is in the Debug power domain.
Attributes
See C8.1 Memory-mapped debug register summary on page C8-644.
RES0
31 0
34
DES_1
78
Revision
JEDEC
2
Figure C8-9 EDPIDR2 bit assignments
[31:8]
Reserved, RES0.
Revision, [7:4]
0x3 r1p0.
JEDEC, [3]
0b1 RAO. Indicates a JEP106 identity code is used.
DES_1, [2:0]
0b011 Arm Limited. This is the most significant nibble of JEP106 ID code.
The EDPIDR2 can be accessed through the external debug interface, offset 0xFE8.
C8 Memory-mapped debug registers
C8.11 External Debug Peripheral Identification Register 2
100236_0100_00_en Copyright © 2015–2017, 2019 Arm Limited or its affiliates. All rights
reserved.
C8-660
Non-Confidential
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