EasyManuals Logo

ARM Cortex-A35 User Manual

Default Icon
894 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #433 background imageLoading...
Page #433 background image
B2.48 Hypervisor Configuration Register, EL2
The HCR_EL2 characteristics are:
Purpose
Provides configuration control for virtualization, including whether various Non-secure
operations are trapped to EL2.
HCR_EL2 is part of the Hypervisor and virtualization registers functional group.
Usage constraints
This register is accessible as follows:
EL0
EL1
(NS)
EL1
(S)
EL2
EL3
(SCR.NS = 1)
EL3
(SCR.NS = 0)
- - - RW RW RW
Configurations
HCR_EL2[31:0] is architecturally mapped to AArch32 register HCR. See B1.61 Hyp
Configuration Register on page B1-240.
HCR_EL2[63:32] is architecturally mapped to AArch32 register HCR2. See B1.62 Hyp
Configuration Register 2 on page B1-246.
Attributes
HCR_EL2 is a 64-bit register.
31 0121112
TRVM
RW PTW
FMO
IMO
AMO
VF
VI
VSE
FB
BSU
DC
TWI
TWE
TID0
HCD
TDZ
TGE
TVM
TTLB
TPU
TSW
TACR
TIDCP
TSC
TID3
TID2
TID1
TPC
SWIO
VM
30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 10 9 8 7 6 5 4 3
RES0
323334
CD
ID
63
Figure B2-22 HCR_EL2 bit assignments
[63:34]
Reserved, RES0.
ID, [33]
B2 AArch64 system registers
B2.48 Hypervisor Configuration Register, EL2
100236_0100_00_en Copyright © 2015–2017, 2019 Arm Limited or its affiliates. All rights
reserved.
B2-433
Non-Confidential

Table of Contents

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the ARM Cortex-A35 and is the answer not in the manual?

ARM Cortex-A35 Specifications

General IconGeneral
BrandARM
ModelCortex-A35
CategoryComputer Hardware
LanguageEnglish

Related product manuals