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ARM Cortex-A35 User Manual

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A4.7 Powering up an individual core
To power up an individual core, apply the following sequence:
1. Assert nCPUPORESET LOW. Ensure DBGPWRDUP is held LOW to prevent any external debug
access to the core.
2. Apply power to the PDCPU power domain. Keep the state of the signals nCPUPORESET and
DBGPWRDUP LOW.
3. Release the core output clamps.
4. Deassert resets.
5. Set the CPUECTLR.SMPEN bit to 1 to enable snooping into the core.
6. Assert DBGPWRDUP HIGH to allow external debug access to the core.
7. If required, use software to restore the state of the core as it was before powerdown.
A4 Power Management
A4.7 Powering up an individual core
100236_0100_00_en Copyright © 2015–2017, 2019 Arm Limited or its affiliates. All rights
reserved.
A4-66
Non-Confidential

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ARM Cortex-A35 Specifications

General IconGeneral
BrandARM
ModelCortex-A35
CategoryComputer Hardware
LanguageEnglish

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