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ARM Cortex-A35 User Manual

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C11.37 ID Register 5
The TRCIDR5 characteristics are:
Purpose
Returns how many resources the trace unit supports.
Usage constraints
There are no usage constraints.
Configurations
Available in all configurations.
Attributes
See C11.1 ETM register summary on page C11-733.
31 025 24 16 15 82728
NUMEXTINRES0TRACEIDSIZE
NUMEXTINSEL
91112
ATBTRIG
30 23 22 21
LPOVERRIDE
RES0
NUMSEQSTATE
NUMCNTR
REDFUNCNTR
Figure C11-36 TRCIDR5 bit assignments
REDFUNCNTR, [31]
Reduced Function Counter implemented:
0 Reduced Function Counter not implemented.
NUMCCNTR, [30:28]
Number of counters implemented:
0b010 Two counters implemented.
NUMSEQSTATE, [27:25]
Number of sequencer states implemented:
0b100 Four sequencer states implemented.
[24]
Reserved, RES0.
LPOVERRIDE, [23]
Low-power state override support:
1 Low-power state override support implemented.
ATBTRIG, [22]
ATB trigger support:
1 ATB trigger support implemented.
TRACEIDSIZE, [21:16]
Number of bits of trace ID:
C11 ETM registers
C11.37 ID Register 5
100236_0100_00_en Copyright © 2015–2017, 2019 Arm Limited or its affiliates. All rights
reserved.
C11-782
Non-Confidential

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ARM Cortex-A35 Specifications

General IconGeneral
BrandARM
ModelCortex-A35
CategoryComputer Hardware
LanguageEnglish

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