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ARM Cortex-A35 User Manual

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C8.4 External Debug Device ID Register 0
The EDDEVID characteristics are:
Purpose
Provides extra information for external debuggers about features of the debug implementation.
Usage constraints
This register is accessible as follows:
Off DLK OSLK EDAD SLK Default
- - - - - RO
Table C1-1 Conditions on external register access to debug registers on page C1-579 describes
the condition codes.
Configurations
The EDDEVID is in the Debug power domain.
Attributes
See C8.1 Memory-mapped debug register summary on page C8-644.
31
0
RES0
34
PC Sample
28 27 24 23
RES0 AuxRegs
Figure C8-3 EDDEVID bit assignments
[31:28]
Reserved, RES0.
AuxRegs, [27:24]
Indicates support for Auxiliary registers:
0x0 None supported.
[23:4]
Reserved, RES0.
PC Sample, [3:0]
Indicates the level of sample-based profiling support using external debug registers 40 to 43:
0x3 EDPCSR, EDCIDSR, and EDVIDSR are implemented.
The EDDEVID can be accessed through the external debug interface, offset 0xFC8.
C8 Memory-mapped debug registers
C8.4 External Debug Device ID Register 0
100236_0100_00_en Copyright © 2015–2017, 2019 Arm Limited or its affiliates. All rights
reserved.
C8-651
Non-Confidential

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ARM Cortex-A35 Specifications

General IconGeneral
BrandARM
ModelCortex-A35
CategoryComputer Hardware
LanguageEnglish

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