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ARM Cortex-A35 User Manual

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B2.15 AArch64 GIC system registers
The following table shows the GIC system registers in AArch64 state.
See the Arm
®
Architecture Reference Manual Armv8, for Armv8-A architecture profile for more
information.
Table B2-15 GIC system registers
Name Type Reset Width Description
ICC_AP0R0_EL1 RW
0x00000000
32 Active Priorities 0 Register 0
ICC_AP1R0_EL1 RW
0x00000000
32 Active Priorities 1 Register 0
ICC_ASGI1R_EL1 WO - 64 Alternate SGI Generation Register 1
ICC_BPR0_EL1 RW
0x00000002
32 Binary Point Register 0
ICC_BPR1_EL1 RW
0x00000003
32
Binary Point Register 1
This is the reset value in Non-secure states. In Secure states, the reset
value is 0x00000002.
ICC_CTLR_EL1 RW
0x00000400
32 Interrupt Control Register for EL1
ICC_CTLR_EL3 RW
0x00000400
32 Interrupt Control Register for EL3
ICC_DIR_EL1 WO - 32 Deactivate Interrupt Register
ICC_EOIR0_EL1 WO - 32 End Of Interrupt Register 0
ICC_EOIR1_EL1 WO - 32 End Of Interrupt Register 1
ICC_HPPIR0_EL1 RO - 32 Highest Priority Pending Interrupt Register 0
ICC_HPPIR1_EL1 RO - 32 Highest Priority Pending Interrupt Register 1
ICC_IAR0_EL1 RO - 32 Interrupt Acknowledge Register 0
ICC_IAR1_EL1 RO - 32 Interrupt Acknowledge Register 1
ICC_IGRPEN0_EL1 RW
0x00000000
32 Interrupt Group Enable Register 0
ICC_IGRPEN1_EL1 RW
0x00000000
32 Interrupt Group Enable Register 1
ICC_IGRPEN1_EL3 RW
0x00000000
32 Interrupt Group Enable Register 1 for EL3
ICC_PMR_EL1 RW
0x00000000
32 Priority Mask Register
ICC_RPR_EL1 RO - 32 Running Priority Register
ICC_SGI0R_EL1 WO - 64 SGI Generation Register 0
ICC_SGI1R_EL1 WO - 64 SGI Generation Register 1
ICC_SRE_EL1 RW
0x00000000
32 System Register Enable Register for EL1
ICC_SRE_EL2 RW
0x00000000
32 System Register Enable Register for EL2
ICC_SRE_EL3 RW
0x00000000
32 System Register Enable Register for EL3
ICH_AP0R0_EL2 RW
0x00000000
32 Interrupt Controller Hyp Active Priorities Register (0,0)
ICH_AP1R0_EL2 RW
0x00000000
32 Interrupt Controller Hyp Active Priorities Register (1,0)
ICH_EISR_EL2 RO
0x00000000
32 Interrupt Controller End of Interrupt Status Register
ICH_ELRSR_EL2 RO
0x0000000F
32 Interrupt Controller Empty List Register Status Register
B2 AArch64 system registers
B2.15 AArch64 GIC system registers
100236_0100_00_en Copyright © 2015–2017, 2019 Arm Limited or its affiliates. All rights
reserved.
B2-380
Non-Confidential

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ARM Cortex-A35 Specifications

General IconGeneral
BrandARM
ModelCortex-A35
CategoryComputer Hardware
LanguageEnglish

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