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ARM Cortex-A35 User Manual

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C11.11 Synchronization Period Register
The TRCSYNCPR characteristics are:
Purpose
Controls how often periodic trace synchronization requests occur.
Usage constraints
You must always program this register as part of trace unit initialization.
Accepts writes only when the trace unit is disabled.
Configurations
Available in all configurations.
Attributes
See C11.1 ETM register summary on page C11-733.
31
0
RES0
45
Period
Figure C11-10 TRCSYNCPR bit assignments
[31:5]
Reserved, RES0.
PERIOD, [4:0]
Defines the number of bytes of trace between synchronization requests as a total of the number
of bytes generated by both the instruction and data streams. The number of bytes is 2
N
where N
is the value of this field:
A value of zero disables these periodic synchronization requests, but does not disable other
synchronization requests.
The minimum value that can be programmed, other than zero, is 8, providing a minimum
synchronization period of 256 bytes.
The maximum value is 20, providing a maximum synchronization period of 2
20
bytes.
The TRCSYNCPR can be accessed through the external debug interface, offset 0x034.
C11 ETM registers
C11.11 Synchronization Period Register
100236_0100_00_en Copyright © 2015–2017, 2019 Arm Limited or its affiliates. All rights
reserved.
C11-748
Non-Confidential

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ARM Cortex-A35 Specifications

General IconGeneral
BrandARM
ModelCortex-A35
CategoryComputer Hardware
LanguageEnglish

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