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ARM Cortex-A35 User Manual

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C11.31 Implementation Specific Register 0
The TRCIMSPEC0 characteristics are:
Purpose
Shows the presence of any implementation specific features, and enables any features that are
provided.
Usage constraints
There are no usage constraints.
Configurations
Available in all configurations.
Attributes
See C11.1 ETM register summary on page C11-733.
31 0
RES0
4
SUPPORT
3
Figure C11-30 TRCIMSPEC0 bit assignments
[31:4]
Reserved, RES0.
SUPPORT, [3:0]
0 No implementation specific extensions are supported.
The TRCIMSPEC0 can be accessed through the external debug interface, offset 0x1C0.
C11 ETM registers
C11.31 Implementation Specific Register 0
100236_0100_00_en Copyright © 2015–2017, 2019 Arm Limited or its affiliates. All rights
reserved.
C11-772
Non-Confidential

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ARM Cortex-A35 Specifications

General IconGeneral
BrandARM
ModelCortex-A35
CategoryComputer Hardware
LanguageEnglish

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