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ARM Cortex-A35

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B3.7 VM Active Priority Register
GICV_APR0
For software compatibility, this register is present in the virtual CPU interface. However, in a virtualized
system, it is not used when preserving and restoring state.
The GICV_APR0 characteristics are:
Purpose
For software compatibility, this register is present in the virtual CPU interface. However, in a
virtualized system, it is not used when preserving and restoring state.
Usage constraints
Reading the content of this register and then writing the same values must not change any state
because there is no requirement to preserve and restore state during a powerdown.
Configurations
Available in all configurations.
Attributes
See the register summary in B3.6 Virtual CPU interface register summary on page B3-565.
The CortexA35 processor implements the GICV_APR0 as an alias of GICH_APR0.
B3 GIC registers
B3.7 VM Active Priority Register
100236_0100_00_en Copyright © 2015–2017, 2019 Arm Limited or its affiliates. All rights
reserved.
B3-566
Non-Confidential

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