ARM Cortex-A35 User Manual

Table B1-14 c12 register summary (continued)
Op1 CRm Op2 Name Reset Description
4 c0 0 HVBAR UNK B1.71 Hyp Vector Base Address Register on page B1-265.
c8 0 ICH_AP0R0
0x00000000
Interrupt Controller Hyp Active Priorities Register (0,0)
c9 0 ICH_AP1R0
0x00000000
Interrupt Controller Hyp Active Priorities Register (1,0)
4 ICH_VSEIR
0x00000000
Interrupt Controller Virtual System Error Interrupt Register
5 ICC_HSRE
0x00000000
System Register Enable Register for EL2
c11 0 ICH_HCR
0x00000000
Interrupt Controller Hyp Control Register
1 ICH_VTR
0x90080003
Interrupt Controller VGIC Type Register
2 ICH_MISR
0x00000000
Interrupt Controller Maintenance Interrupt State Register
3 ICH_EISR
0x00000000
Interrupt Controller End of Interrupt Status Register
7 ICH_VMCR
0x004C0000
Interrupt Controller Virtual Machine Control Register
5 ICH_ELRSR
0x0000000F
Interrupt Controller Empty List Register Status Register
c12 0 ICH_LR0
0x00000000
Interrupt Controller List Register 0
1 ICH_LR1
0x00000000
Interrupt Controller List Register 1
2 ICH_LR2
0x00000000
Interrupt Controller List Register 2
3 ICH_LR3
0x00000000
Interrupt Controller List Register 3
c14 0 ICH_LRC0
0x00000000
Interrupt Controller List Register 0
1 ICH_LRC1
0x00000000
Interrupt Controller List Register 1
2 ICH_LRC2
0x00000000
Interrupt Controller List Register 2
3 ICH_LRC3
0x00000000
Interrupt Controller List Register 3
6 c12 4 ICC_MCTLR
0x00000400
Interrupt Control Register for EL3
5 ICC_MSRE
0x00000000
System Register Enable Register for EL3
7 ICC_MGRPEN1
0x00000000
Interrupt Controller Monitor Interrupt Group 1 Enable register
B1 AArch32 system registers
B1.15 c12 registers
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B1-171
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ARM Cortex-A35 Specifications

General

Brand	ARM
Model	Cortex-A35
Category	Computer Hardware
Language	English