Clock
HIGH to LOW
Transient
HIGH/LOW to HIGH
Bus stable
Bus to high impedance
Bus change
High impedance to stable bus
Figure 1 Key to timing diagram conventions
Signals
The signal conventions are:
Signal level
The level of an asserted signal depends on whether the signal is active-HIGH or active-LOW.
Asserted means:
• HIGH for active-HIGH signals.
• LOW for active-LOW signals.
Lowercase n
At the start or end of a signal name denotes an active-LOW signal.
Additional reading
This book contains information that is specific to this product. See the following documents for other
relevant information.
Arm publications
• Arm
®
AMBA
®
AXI and ACE Protocol Specification AXI, AXI4, and AXI4-Lite, ACE and
ACE-Lite (IHI 0022).
• Arm
®
AMBA
®
APB Protocol Specification (IHI 0024).
• Arm
®
AMBA
®
ATB Protocol Specification (IHI 0032).
• Arm
®
Low Power Interface Specification Q-Channel and P-Channel Interfaces (IHI 0068).
• Arm
®
Architecture Reference Manual Armv8, for Armv8-A architecture profile (DDI 0487).
• Arm
®
Generic Interrupt Controller Architecture Specification (IHI 0069).
• Arm
®
Embedded Trace Macrocell Architecture Specification ETMv4 (IHI 0064).
• Arm
®
CoreSight
™
Architecture Specification (IHI 0029).
• Arm
®
Cortex-A Series Programmer’s Guide for Armv8-A (DEN 0024).
The following confidential books are only available to licensees:
• Arm
®
Cortex
®
‑
A35 Configuration and Sign-off Guide (100239).
• Arm
®
Cortex
®
‑
A35 Processor Integration Manual (100240).
• Arm
®
Cortex
®
‑
A35 Processor Cryptographic Extension Technical Reference Manual
(100237).
• Arm
®
Cortex
®
‑
A35 Processor Advanced SIMD and Floating-point Support Technical
Reference Manual (100238).
• Arm
®
AMBA
®
5 CHI Protocol Specification (IHI 0050).
• Arm
®
Armv8 AArch32 UNPREDICTABLE behaviors (PRD03-GENC-010544).
Preface
Additional reading
100236_0100_00_en Copyright © 2015–2017, 2019 Arm Limited or its affiliates. All rights
reserved.
23
Non-Confidential