ARM Cortex-A35 User Manual

Attrm, [7:0]
Where m is 0-7.
The memory attribute encoding for an AttrIndx[2:0] entry in a Long descriptor format
translation table entry, where:
• AttrIndx[2] selects the appropriate MAIR:
— Setting AttrIndx[2] to 0 selects MAIR0.
— Setting AttrIndx[2] to 1 selects MAIR1.
• AttrIndx[2:0] gives the value of <n> in Attr<n>.
Table B1-76 Attr<n>[7:4] bit assignments
Bits Meaning
0b0000
Device memory. See Attr<n>[3:0] bit assignments on page B1-311 for the type of Device memory.
0b00RW, RW not 00
Normal Memory, Outer Write-through transient.
The transient hint is ignored.
0b0100
Normal Memory, Outer Non-Cacheable.
0b01RW, RW not 00
Normal Memory, Outer Write-back transient.
The transient hint is ignored.
0b10RW
Normal Memory, Outer Write-through non-transient.
0b11RW
Normal Memory, Outer Write-back non-transient.
The following table shows the Attr<n>[3:0] bit assignments. The encoding of Attr<n>[3:0] depends on
the value of Attr<n>[7:4].
Table B1-77 Attr<n>[3:0] bit assignments
Bits Meaning when Attr<n>[7:4] is 0000 Meaning when Attr<n>[7:4] is not 0000
0b0000
Device-nGnRnE memory UNPREDICTABLE
0b00RW, RW not 00 UNPREDICTABLE Normal Memory, Inner Write-through transient
0b0100
Device-nGnRE memory Normal memory, Inner Non-Cacheable
0b01RW, RW not 00 UNPREDICTABLE Normal Memory, Inner Write-back transient
0b1000
Device-nGRE memory Normal Memory, Inner Write-through non-transient (RW=00)
0b10RW, RW not 00 UNPREDICTABLE Normal Memory, Inner Write-through non-transient
0b1100
Device-GRE memory Normal Memory, Inner Write-back non-transient (RW=00)
0b11RW, RW not 00 UNPREDICTABLE Normal Memory, Inner Write-back non-transient
The following table shows the encoding of the R and W bits that are used, in some Attr<n> encodings in
Table B1-76 Attr<n>[7:4] bit assignments on page B1-311 and Table B1-77 Attr<n>[3:0] bit
assignments on page B1-311, to define the read-allocate and write-allocate policies:
Table B1-78 Encoding of R and W bits in some Attrm fields
R or W Meaning
0 Do not allocate
1 Allocate
B1 AArch32 system registers
B1.95 Memory Attribute Indirection Registers 0 and 1
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reserved.
B1-311
Non-Confidential

ARM Cortex-A35 Specifications

General

Brand	ARM
Model	Cortex-A35
Category	Computer Hardware
Language	English