B1.116 Translation Table Base Register 1 ...................................................................... B1-350
B1.117 TTBR1 with Short-descriptor translation table format .................... .................... B1-351
B1.118 TTBR1 with Long-descriptor translation table format .......................................... B1-353
B1.119 Vector Base Address Register ............................................................................ B1-354
B1.120 Virtualization Multiprocessor ID Register ............................................................ B1-355
B1.121 Virtualization Processor ID Register ................................. ................................. B1-356
B1.122 Virtualization Translation Control Register .......................................................... B1-357
Chapter B2 AArch64 system registers
B2.1 AArch64 register summary .................................................................................. B2-362
B2.2 AArch64 Identification registers .......................................................................... B2-363
B2.3 AArch64 Exception handling registers ................................................................ B2-365
B2.4 AArch64 Virtual memory control registers ............................. ............................. B2-366
B2.5 AArch64 Other System control registers .............................. .............................. B2-368
B2.6 AArch64 Cache maintenance operations ............................................................ B2-369
B2.7 AArch64 TLB maintenance operations ............................... ............................... B2-370
B2.8 AArch64 Address translation operations .............................. .............................. B2-371
B2.9 AArch64 Miscellaneous operations .................................. .................................. B2-372
B2.10 AArch64 Performance monitor registers .............................. .............................. B2-373
B2.11 AArch64 Reset registers .......................................... .......................................... B2-375
B2.12 AArch64 Secure registers ......................................... ......................................... B2-376
B2.13 AArch64 Virtualization registers .......................................................................... B2-377
B2.14 AArch64 EL2 TLB maintenance operations ........................................................ B2-379
B2.15 AArch64 GIC system registers ............................................................................ B2-380
B2.16 AArch64 Generic Timer registers ........................................................................ B2-382
B2.17 AArch64 Thread registers ......................................... ......................................... B2-383
B2.18 AArch64 Implementation defined registers ............................ ............................ B2-384
B2.19 Auxiliary Control Register, EL1 ..................................... ..................................... B2-386
B2.20 Auxiliary Control Register, EL2 ..................................... ..................................... B2-387
B2.21 Auxiliary Control Register, EL3 ..................................... ..................................... B2-389
B2.22 Auxiliary Fault Status Register 0, EL1, EL2, and EL3 .................... .................... B2-391
B2.23 Auxiliary Fault Status Register 1, EL1, EL2, and EL3 .................... .................... B2-392
B2.24 Auxiliary ID Register, EL1 ......................................... ......................................... B2-393
B2.25 Auxiliary Memory Attribute Indirection Register, EL1 .......................................... B2-394
B2.26 Auxiliary Memory Attribute Indirection Register, EL2 .......................................... B2-395
B2.27 Auxiliary Memory Attribute Indirection Register, EL3 .......................................... B2-396
B2.28 Configuration Base Address Register, EL1 ............................ ............................ B2-397
B2.29 Cache Size ID Register, EL1 ....................................... ....................................... B2-398
B2.30 Cache Level ID Register, EL1 ...................................... ...................................... B2-400
B2.31 Architectural Feature Access Control Register, EL1 ..................... ..................... B2-402
B2.32 Architectural Feature Trap Register, EL2 ............................................................ B2-404
B2.33 Architectural Feature Trap Register, EL3 ............................................................ B2-406
B2.34 Cache Size Selection Register, EL1 ................................. ................................. B2-408
B2.35 Cache Type Register, EL0 ......................................... ......................................... B2-410
B2.36 CPU Auxiliary Control Register, EL1 ................................. ................................. B2-412
B2.37 CPU Extended Control Register, EL1 ................................ ................................ B2-416
B2.38 CPU Memory Error Syndrome Register, EL1 ...................................................... B2-418
B2.39 Domain Access Control Register, EL2 ................................................................ B2-421
B2.40 Data Cache Zero ID Register, EL0 ...................................................................... B2-422
B2.41 Exception Syndrome Register, EL1 .................................................................... B2-423
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