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ARM Cortex-A35 User Manual

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Table B1-29 Memory access registers (continued)
Name CRn Op1 CRm Op2 Reset Width Description
CPUACTLR - 0 c15 -
0x00000000090CA000
64-bit B1.42 CPU Auxiliary Control Register
on page B1-208
CPUECTLR - 1 c15 -
0x0000000000000000
64-bit B1.43 CPU Extended Control Register
on page B1-212
CPUMERRSR - 2 c15 - - 64-bit B1.44 CPU Memory Error Syndrome Register
on page B1-214
L2MERRSR - 3 c15 - - 64-bit B1.94 L2 Memory Error Syndrome Register
on page B1-307
B1 AArch32 system registers
B1.31 AArch32 Implementation defined registers
100236_0100_00_en Copyright © 2015–2017, 2019 Arm Limited or its affiliates. All rights
reserved.
B1-192
Non-Confidential

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ARM Cortex-A35 Specifications

General IconGeneral
BrandARM
ModelCortex-A35
CategoryComputer Hardware
LanguageEnglish

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