0b0010LL Access fault flag, LL bits indicate level.
0b0011LL Permission fault, LL bits indicate level.
0b010000 Synchronous external abort.
0b010001 Asynchronous external abort.
0b0101LL Synchronous external abort on translation table walk, LL bits indicate level.
0b011000 Synchronous parity error on memory access.
0b011001 Asynchronous parity error on memory access (DFSR only).
0b0111LL Synchronous parity error on memory access on translation table walk, first level, LL
bits indicate level.
0b100001 Alignment fault.
0b100010 Debug event.
0b110000 TLB conflict abort.
0b110101 LDREX or STREX abort.
Table B1-43 Encodings of LL bits associated with the MMU fault
Bits Meaning
0b00
Reserved
0b01
Level 1
0b10
Level 2
0b11
Level 3
To access the DFSR:
MRC p15, 0, <Rt>, c5, c0, 0; Read DFSR into Rt
MCR p15, 0, <Rt>, c5, c0, 0; Write Rt to DFSR
B1 AArch32 system registers
B1.51 DFSR with Long-descriptor translation table format
100236_0100_00_en Copyright © 2015–2017, 2019 Arm Limited or its affiliates. All rights
reserved.
B1-227
Non-Confidential
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