Security support:
0x1 Security implemented. This includes support for Monitor mode and the SMC
instruction.
ProgMod, [3:0]
Indicates support for the standard programmers model for Armv4 and later.
Model must support User, FIQ, IRQ, Supervisor, Abort, Undefined and System modes:
0x1 Supported.
To access the ID_PFR1:
MRC p15,0,<Rt>,c0,c1,1 ; Read ID_PFR1 into Rt
Register access is encoded as follows:
Table B1-68 ID_PFR1 access encoding
coproc opc1 CRn CRm opc2
1111 000 0000 0001 001
B1 AArch32 system registers
B1.85 Processor Feature Register 1
100236_0100_00_en Copyright © 2015–2017, 2019 Arm Limited or its affiliates. All rights
reserved.
B1-292
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