ARM Cortex-A35 User Manual

Table B1-85 Memory attributes and the n value for the PRRR field descriptions (continued)
Attributes n value
TEX[0] C B
1 0 0 4
1 0 1 5
1 1 0 6
1 1 1 7
Large physical address translations use Long-descriptor translation table formats and MAIR0 replaces
the PRRR, and MAIR1 replaces the NMRR. For more information see B1.95 Memory Attribute
Indirection Registers 0 and 1 on page B1-310.
To access the PRRR:
MRC p15, 0, <Rt>, c10, c2, 0 ; Read PRRR into Rt
MCR p15, 0, <Rt>, c10, c2, 0 ; Write Rt to PRRR
Register access is encoded as follows:
Table B1-86 PRRR access encoding
coproc opc1 CRn CRm opc2
1111 000 1010 0010 000
B1 AArch32 system registers
B1.101 Primary Region Remap Register
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B1-324
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ARM Cortex-A35 Specifications

General

Brand	ARM
Model	Cortex-A35
Category	Computer Hardware
Language	English