ARM Cortex-A35 User Manual

0 Instructions are not trapped. This is the reset value if Advanced SIMD and floating-point are
implemented.
1 Instructions are trapped. This is always the value if Advanced SIMD and floating-point are
not implemented.
[9:0]
Reserved, RES1.
To access the CPTR_EL2:
MRS <Xt>, CPTR_EL2 ; Read CPTR_EL2 into Xt
MSR CPTR_EL2, <Xt> ; Write Xt to CPTR_EL2
B2 AArch64 system registers
B2.32 Architectural Feature Trap Register, EL2
100236_0100_00_en Copyright © 2015–2017, 2019 Arm Limited or its affiliates. All rights
reserved.
B2-405
Non-Confidential

ARM Cortex-A35 Specifications

General

Brand	ARM
Model	Cortex-A35
Category	Computer Hardware
Language	English