ARM Cortex-A35 User Manual

Indicates support for coprocessor-based Secure debug model:
0x6 Processor supports v8 Debug architecture, with CP14 access.
CopDbg, [3:0]
Indicates support for coprocessor-based debug model:
0x6 Processor supports v8 Debug architecture, with CP14 access.
To access the ID_DFR0_EL1:
MRS <Xt>, ID_DFR0_EL1 ; Read ID_DFR0_EL1 into Xt
Register access is encoded as follows:
Table B2-48 ID_DFR0_EL1 access encoding
op0 op1 CRn CRm op2
1111 000 0000 0001 010
B2 AArch64 system registers
B2.56 AArch32 Debug Feature Register 0, EL1
100236_0100_00_en Copyright © 2015–2017, 2019 Arm Limited or its affiliates. All rights
reserved.
B2-454
Non-Confidential

ARM Cortex-A35 Specifications

General

Brand	ARM
Model	Cortex-A35
Category	Computer Hardware
Language	English