ARM Cortex-A35

PMSA, [7:4]
Indicates support for a Protected Memory System Architecture (PMSA):
0x0 Not supported.
VMSA, [3:0]
Indicates support for a Virtual Memory System Architecture (VMSA).
0x5 Support for:
• VMSAv7, with support for remapping and the Access flag.
• The PXN bit in the Short-descriptor translation table format descriptors.
• The Long-descriptor translation table format.
To access the ID_MMFR0_EL1:
MRS <Xt>, ID_MMFR0_EL1 ; Read ID_MMFR0_EL1 into Xt
Register access is encoded as follows:
Table B2-55 ID_MMFR0_EL1 access encoding
op0 op1 CRn CRm op2
11 000 0000 0001 100
B2 AArch64 system registers
B2.63 AArch32 Memory Model Feature Register 0, EL1
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B2-468
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