EasyManua.ls Logo

ARM Cortex-A35

Default Icon
894 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
Indicates the level of support for the Immediate Virtual Address (IVA) matching breakpoint
masking capability. This value is:
0xF Breakpoint address masking not implemented. DBGBCRn[28:24] are RES0.
WPAddrMask, [7:4]
Indicates the level of support for the DVA matching watchpoint masking capability. This value
is:
0x1 Watchpoint address mask implemented.
PCSample, [3:0]
Indicates the level of support for Program Counter sampling using debug registers 40 and 41.
This value is:
0x3 EDPCSR, EDCIDSR and EDVIDSR are implemented as debug registers 40, 41, and
42.
To access the DBGDEVID:
MRC p14, 0, <Rt>, c7, c2, 7; Read Debug Device ID Register 0
C6 AArch32 debug registers
C6.5 Debug Device ID Register
100236_0100_00_en Copyright © 2015–2017, 2019 Arm Limited or its affiliates. All rights
reserved.
C6-631
Non-Confidential

Table of Contents

Related product manuals