ARM Cortex-A35

To access the DBGWCRn_EL1:
MRS <Xt>, DBGWCRn_EL1; Read Debug Watchpoint Control Register nMSR DBGWCRn_EL1, <Xt>; Write
Debug Watchpoint Control Register n
The DBGWCRn_EL1 can be accessed through the external debug interface, offset 0x8n8. The range of n
for DBGWCRn_EL1 is 0 to 3.
C7 AArch64 debug registers
C7.3 Debug Watchpoint Control Registers, EL1
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C7-641
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