Chapter C8
Memory-mapped debug registers
This chapter describes the debug memory-mapped registers and shows examples of how to use them.
It contains the following sections:
• C8.1 Memory-mapped debug register summary on page C8-644.
• C8.2 External Debug Reserve Control Register on page C8-648.
• C8.3 External Debug Integration Mode Control Register on page C8-650.
• C8.4 External Debug Device ID Register 0 on page C8-651.
• C8.5 External Debug Device ID Register 1 on page C8-652.
• C8.6 External Debug Processor Feature Register on page C8-653.
• C8.7 External Debug Feature Register on page C8-655.
• C8.8 External Debug Peripheral Identification Registers on page C8-657.
• C8.9 External Debug Peripheral Identification Register 0 on page C8-658.
• C8.10 External Debug Peripheral Identification Register 1 on page C8-659.
• C8.11 External Debug Peripheral Identification Register 2 on page C8-660.
• C8.12 External Debug Peripheral Identification Register 3 on page C8-661.
• C8.13 External Debug Peripheral Identification Register 4 on page C8-662.
• C8.14 External Debug Peripheral Identification Register 5-7 on page C8-663.
• C8.15 External Debug Component Identification Registers on page C8-664.
• C8.16 External Debug Component Identification Register 0 on page C8-665.
• C8.17 External Debug Component Identification Register 1 on page C8-666.
• C8.18 External Debug Component Identification Register 2 on page C8-667.
• C8.19 External Debug Component Identification Register 3 on page C8-668.
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