ARM Cortex-A35

Table C10-4 PMU register summary in the AArch64 Execution state (continued)
Name Type Width Description
PMEVTYPER0_EL0 RW 32
Performance Monitors Event Type Registers
PMEVTYPER1_EL0 RW 32
PMXVTYPER2_EL0 RW 32
PMEVTYPER3_EL0 RW 32
PMEVTYPER4_EL0 RW 32
PMEVTYPER5_EL0 RW 32
PMCCFILTR_EL0 RW 32
Performance Monitors Cycle Count Filter Register
C10 PMU registers
C10.5 AArch64 PMU register summary
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C10-703
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