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ARM Cortex-A35 User Manual

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Table C10-4 PMU register summary in the AArch64 Execution state (continued)
Name Type Width Description
PMEVTYPER0_EL0 RW 32
Performance Monitors Event Type Registers
PMEVTYPER1_EL0 RW 32
PMXVTYPER2_EL0 RW 32
PMEVTYPER3_EL0 RW 32
PMEVTYPER4_EL0 RW 32
PMEVTYPER5_EL0 RW 32
PMCCFILTR_EL0 RW 32
Performance Monitors Cycle Count Filter Register
C10 PMU registers
C10.5 AArch64 PMU register summary
100236_0100_00_en Copyright © 2015–2017, 2019 Arm Limited or its affiliates. All rights
reserved.
C10-703
Non-Confidential

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ARM Cortex-A35 Specifications

General IconGeneral
BrandARM
ModelCortex-A35
CategoryComputer Hardware
LanguageEnglish

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