ARM Cortex-A35 User Manual

Repeat error count, [39:32]
This field is set to 0 on the first memory error and is incremented on any memory error that
exactly matches the RAMID and Bank/Way information in this register while the sticky Valid
bit is set.
The reset value is 0.
Valid, [31]
Valid bit. This bit is set to 1 on the first memory error. It is a sticky bit so that after it is set, it
remains set until the register is written.
The reset value is 0.
RAMID, [30:24]
RAM Identifier. Indicates the RAM in which the first memory error. The possible values are:
0x00 L1 Instruction tag RAM.
0x01 L1 Instruction data RAM.
0x08 L1 Data tag RAM.
0x09 L1 Data data RAM.
0x0A L1 Data dirty RAM.
0x18 TLB RAM.
[23:21]
Reserved, RES0.
CPUID/Way, [20:18]
Indicates the RAM where the first memory error occurred.
L1 I-tag RAM
0x0 Way 0
0x1 Way 1
0x2-0x7 Unused
L1 I-data RAM
0x0 Bank 0
0x1 Bank 1
0x2-0x7 Unused
TLB RAM
0x0 Way 0
0x1 Way 1
0x2-0x7 Unused
L1 D-dirty RAM
0x0 Dirty RAM
0x1-0x7 Unused
L1 D-tag RAM
0x0 Way 0
0x1 Way 1
0x2 Way 2
B2 AArch64 system registers
B2.38 CPU Memory Error Syndrome Register, EL1
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ARM Cortex-A35 Specifications

General

Brand	ARM
Model	Cortex-A35
Category	Computer Hardware
Language	English