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ARM Cortex-A35

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To access the SCTLR_EL3:
MRS <Xt>, SCTLR_EL3 ; Read SCTLR_EL3 into Xt
MSR SCTLR_EL3, <Xt> ; Write Xt to SCTLR_EL3
Register access is encoded as follows:
Table B2-86 SCTLR_EL3 access encoding
op0 op1 CRn CRm op2
11 110 0001 0000 000
B2 AArch64 system registers
B2.92 System Control Register, EL3
100236_0100_00_en Copyright © 2015–2017, 2019 Arm Limited or its affiliates. All rights
reserved.
B2-534
Non-Confidential

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