ARM Cortex-A35 User Manual

0 Unlinked data address match.
1 Linked data address match.
On Cold reset, the field reset value is architecturally UNKNOWN.
LBN, [19:16]
Linked breakpoint number. For Linked data address watchpoints, this specifies the index of the
Context-matching breakpoint linked to.
On Cold reset, the field reset value is architecturally UNKNOWN.
SSC, [15:14]
Security state control. Determines the Security states under which a watchpoint debug event for
watchpoint n is generated. This field must be interpreted along with the HMC and PAC fields.
On Cold reset, the field reset value is architecturally UNKNOWN.
HMC, [13]
Higher mode control. Determines the debug perspective for deciding when a watchpoint debug
event for watchpoint n is generated. This field must be interpreted along with the SSC and
PACfields.
On Cold reset, the field reset value is architecturally UNKNOWN.
BAS, [12:5]
Byte address select. Each bit of this field selects whether a byte from within the word or double-
word addressed by DBGWVRn is being watched. See the Arm
®
Architecture Reference Manual
Armv8, for Armv8-A architecture profile for more information.
LSC, [4:3]
Load/store access control. This field enables watchpoint matching on the type of access being
made. The possible values are:
0b01 Match instructions that load from a watchpointed address.
0b10 Match instructions that store to a watchpointed address.
0b11 Match instructions that load from or store to a watchpointed address.
All other values are reserved, but must behave as if the watchpoint is disabled. Software must
not rely on this property as the behavior of reserved values might change in a future revision of
the architecture.
Ignored if E is 0.
On Cold reset, the field reset value is architecturally UNKNOWN.
PAC, [2:1]
Privilege of access control. Determines the exception level or levels at which a watchpoint
debug event for watchpoint n is generated. This field must be interpreted along with the SSC
and HMCfields.
On Cold reset, the field reset value is architecturally UNKNOWN.
E, [0]
Enable watchpoint n. Possible values are:
0 Watchpoint disabled.
1 Watchpoint enabled.
On Cold reset, the field reset value is architecturally UNKNOWN.
C6 AArch32 debug registers
C6.3 Debug Watchpoint Control Registers
100236_0100_00_en Copyright © 2015–2017, 2019 Arm Limited or its affiliates. All rights
reserved.
C6-626
Non-Confidential

ARM Cortex-A35 Specifications

General

Brand	ARM
Model	Cortex-A35
Category	Computer Hardware
Language	English