ARM Cortex-A35

To access the DBGWCRn:
MRC p14, 0, <Rt>, c0, cn, 7; Read Debug Watchpoint Control Register nMCR p14, 0, <Rt>, c0,
cn, 7; Write Debug Watchpoint Control Register n
The DBGWCRn_EL1 can be accessed through the external debug interface, offset 0x8n8. The range of n
for DBGWCRn_EL1 is 0 to 3.
C6 AArch32 debug registers
C6.3 Debug Watchpoint Control Registers
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