ARM Cortex-A35 User Manual

0 ReadUnique used for prefetch streams initiated from STB accesses. This is the
reset value.
1 ReadShared used for prefetch streams initiated from STB accesses.
STBPFDIS, [22]
Disable prefetch streams initiated from STB accesses:
0 Enable Prefetch streams initiated from STB accesses. This is the reset value.
1 Disable Prefetch streams initiated from STB accesses.
[21]
Reserved, RES0.
NPFSTRM, [20:19]
Number of independent data prefetch streams. The possible values are:
0b00 1 stream.
0b01 2 streams. This is the reset value.
0b10 3 streams.
0b11 4 streams.
DSTDIS, [18]
Enable device split throttle. The possible values are:
0 Device split throttle disabled.
1 Device split throttle enabled. This is the reset value.
STRIDE, [17]
Enable stride detection. The possible values are:
0 2 consecutive strides to trigger prefetch. This is the reset value.
1 3 consecutive strides to trigger prefetch.
[16]
Reserved, RES0.
L1PCTL, [15:13]
L1 Data prefetch control. The value of the this field determines the maximum number of
outstanding data prefetches allowed in the L1 memory system, excluding those generated by
software load or PLD instructions. The possible values are:
0b000 Prefetch disabled.
0b001 1 outstanding prefetch allowed.
0b010 2 outstanding prefetches allowed.
0b011 3 outstanding prefetches allowed.
0b100 4 outstanding prefetches allowed.
0b101 5 outstanding prefetches allowed. This is the reset value.
0b110 6 outstanding prefetches allowed.
0b111 8 outstanding prefetches allowed.
[12]
Reserved, RES0.
DYNSDIS, [11]
Disable dynamic stride adjustment for prefetch streams. The possible values are:
B1 AArch32 system registers
B1.42 CPU Auxiliary Control Register
100236_0100_00_en Copyright © 2015–2017, 2019 Arm Limited or its affiliates. All rights
reserved.
B1-210
Non-Confidential

ARM Cortex-A35 Specifications

General

Brand	ARM
Model	Cortex-A35
Category	Computer Hardware
Language	English