Appendix A
Signal Descriptions
This appendix describes the signals at the external interfaces of the processor.
It contains the following sections:
• A.1 About the signal descriptions on page Appx-A-848.
• A.2 Processor configuration signals on page Appx-A-849.
• A.3 Clock signals on page Appx-A-850.
• A.4 Reset signals on page Appx-A-851.
• A.5 GIC signals on page Appx-A-852.
• A.6 Generic Timer signals on page Appx-A-855.
• A.7 Power management signals on page Appx-A-856.
• A.8 L2 error signals on page Appx-A-858.
• A.9 ACP interface signals on page Appx-A-859.
• A.10 Broadcast signals for the memory interface on page Appx-A-861.
• A.11 AXI interface signals on page Appx-A-862.
• A.12 ACE interface signals on page Appx-A-864.
• A.13 CHI interface signals on page Appx-A-868.
• A.14 Debug signals on page Appx-A-871.
• A.15 APB interface signals on page Appx-A-873.
• A.16 ATB interface signals on page Appx-A-874.
• A.17 ETM signals on page Appx-A-875.
• A.18 PMU interface signals on page Appx-A-876.
• A.19 CTI interface signals on page Appx-A-877.
• A.20 DFT interface signals on page Appx-A-878.
• A.21 MBIST interface signals on page Appx-A-879.
100236_0100_00_en
Copyright © 2015–2017, 2019 Arm Limited or its affiliates. All rights
reserved.
Appx-A-847
Non-Confidential
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