Chapter C3 ETM
C3.1 About the ETM .................................................................................................... C3-596
C3.2 Configuration options for the ETM unit and trace resources ............... ............... C3-598
C3.3 Resetting the ETM .............................................................................................. C3-600
C3.4 Programming and reading ETM trace unit registers ..................... ..................... C3-601
Chapter C4 CTI
C4.1 About the cross-trigger ........................................................................................ C4-604
C4.2 Cross-trigger inputs and outputs .................................... .................................... C4-605
Chapter C5 Direct access to internal memory
C5.1 About direct access to internal memory .............................................................. C5-608
C5.2 Encoding for tag and data in the L1 instruction cache ........................................ C5-609
C5.3 Encoding for tag and data in the L1 data cache ........................ ........................ C5-610
C5.4 Encoding for the main TLB RAM .................................... .................................... C5-612
C5.5 Encoding for walk cache .......................................... .......................................... C5-617
C5.6 Encoding for IPA cache ...................................................................................... C5-618
Chapter C6 AArch32 debug registers
C6.1 AArch32 debug register summary ................................... ................................... C6-620
C6.2 Debug Breakpoint Control Registers ................................. ................................. C6-622
C6.3 Debug Watchpoint Control Registers .................................................................. C6-625
C6.4 Debug ID Register .............................................................................................. C6-628
C6.5 Debug Device ID Register ......................................... ......................................... C6-630
C6.6 Debug Device ID Register 1 ....................................... ....................................... C6-632
Chapter C7 AArch64 debug registers
C7.1 AArch64 debug register summary ................................... ................................... C7-634
C7.2 Debug Breakpoint Control Registers, EL1 .......................................................... C7-636
C7.3 Debug Watchpoint Control Registers, EL1 ............................ ............................ C7-639
Chapter C8 Memory-mapped debug registers
C8.1 Memory-mapped debug register summary ............................ ............................ C8-644
C8.2 External Debug Reserve Control Register .......................................................... C8-648
C8.3 External Debug Integration Mode Control Register ............................................ C8-650
C8.4 External Debug Device ID Register 0 ................................ ................................ C8-651
C8.5 External Debug Device ID Register 1 ................................ ................................ C8-652
C8.6 External Debug Processor Feature Register ...................................................... C8-653
C8.7 External Debug Feature Register ................................... ................................... C8-655
C8.8 External Debug Peripheral Identification Registers ...................... ...................... C8-657
C8.9 External Debug Peripheral Identification Register 0 ..................... ..................... C8-658
C8.10 External Debug Peripheral Identification Register 1 ..................... ..................... C8-659
C8.11 External Debug Peripheral Identification Register 2 ..................... ..................... C8-660
C8.12 External Debug Peripheral Identification Register 3 ..................... ..................... C8-661
C8.13 External Debug Peripheral Identification Register 4 ..................... ..................... C8-662
C8.14 External Debug Peripheral Identification Register 5-7 ........................................ C8-663
C8.15 External Debug Component Identification Registers .......................................... C8-664
C8.16 External Debug Component Identification Register 0 .................... .................... C8-665
C8.17 External Debug Component Identification Register 1 .................... .................... C8-666
C8.18 External Debug Component Identification Register 2 .................... .................... C8-667
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