ARM Cortex-A35 User Manual

Chapter B1 AArch32 system registers
This chapter describes the system registers in the AArch32 state.
Chapter B2 AArch64 system registers
This chapter describes the system registers in the AArch64 state.
Chapter B3 GIC registers
This chapter describes the GIC registers.
Chapter B4 Generic Timer registers
This chapter describes the Generic Timer registers.
Part C Debug
This part describes the debug functionality and registers of the Cortex‑A35 processor.
Chapter C1 Debug
This chapter describes the debug features of the processor.
Chapter C2 PMU
This chapter describes the Performance Monitor Unit (PMU) of the processor.
Chapter C3 ETM
This chapter describes the Embedded Trace Macrocell (ETM) of the processor.
Chapter C4 CTI
This chapter describes the cross-trigger components of the processor.
Chapter C5 Direct access to internal memory
This chapter describes the direct access to internal memory that caches and TLBs use.
Chapter C6 AArch32 debug registers
This chapter describes the debug registers in the AArch32 execution state and shows examples of
how to use them.
Chapter C7 AArch64 debug registers
This chapter describes the debug registers in the AArch64 execution state and shows examples of
how to use them.
Chapter C8 Memory-mapped debug registers
This chapter describes the debug memory-mapped registers and shows examples of how to use
them.
Chapter C9 ROM table
This chapter describes the ROM table that debuggers can use to determine which components are
implemented. It also describes the ROM table registers.
Chapter C10 PMU registers
This chapter describes the PMU registers.
Chapter C11 ETM registers
This chapter describes the ETM registers.
Chapter C12 CTI registers
This chapter describes the CTI registers.
Part D Appendices
Appendix A Signal Descriptions
This appendix describes the signals at the external interfaces of the processor.
Appendix B AArch32 UNPREDICTABLE Behaviors
The cases in which the Cortex‑A35 processor implementation diverges from the preferred
behavior described in Armv8 AArch32 UNPREDICTABLE behaviors.
Preface
Using this book
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ARM Cortex-A35 Specifications

General

Brand	ARM
Model	Cortex-A35
Category	Computer Hardware
Language	English