Toshiba GR200 Series - Page 229

6F2S1914 (0.49)
GRL200 (Soft 033 & 037)
- 206 -
DEFCAR-ARCBlk
&
&
&
From Terminal 1
Permission signals received:
From Terminal 2
To carrier send circuit
8000001B6A
8100001B6B
8200001B6C
≥1
≥1
≥1
≥1
8000001B74
8100001B75
8200001B76
DEFCAR-OPT-AR
DEFCAR-OPT-BR
DEFCAR-OPT-CR
DEFCAR-OPT-S
8300001B77
≥1
≥1
≥1
&
≥1
DEFCAR-ARC-BLOCK
8000001B20
8100001B21
8200001B22
DEFCAR-TRIP-A
DEFCAR-TRIP-B
DEFCAR-TRIP-C
≥1
3P
DEFCAR_TPMD
&
8100001B77
Block
Week infeed
trip logic
(WIKT)
To TRC
DEFCAR-CS-C_POUP
DEFCAR-CS-B_POUP
DEFCAR-CS-A_POUP
810000EBC1 DEFCAR_3PTP
800000EBC0 DEFCAR_ARCBLOCK
800000EBB0 DEFCAR_BLK
CAR_BLOCK
From CARRIER-COMMON
≥1
1
≥1
≥1
≥1
CH1-USE
1
CH2-USE
1
≥1
≥1
≥1
=1
=1
=1
=1
=1
=1
≥1
=1
=1
1P
DEFCAR-TPMD=1P
≥1
≥1
≥1
≥1
≥1
1
External DEFCAR-R1
DEFCF
-CX
OCD-AT
-CX
OCT-BT
-CX
≥1
OCT-CT
-CX
From PROT-COMMON
S
R
S
R
S
R
≥1
≥1
800000EBBB EFF PHSEL-A
800000EBBC EFF PHSEL-B
800000EBBD EFF PHSEL-C
≥1
1
≥1
≥1
≥1
&
&
&
&
&
&
t 0
TDEFCF
t 0
t 0
0.00 to 0.30s
&
&
&
1
Current
Reversal
Logic
(CRL)
≥1
DEFCR-X
DEFCF-X
t 0
TDEFCB
0.00 to 0.30s
&
From EF (EF2)
DEFCR
-CX
&
&
&
To CRL
VTF_DETECT
CB_LOSS_PHASE
From VTF
From PROT COMMON
1
≥1
DEFCAR_PERM1-A
DEFCAR_PERM1-B
DEFCAR_PERM1-C
DEFCAR_PERM2-A
DEFCAR_PERM2-B
DEFCAR_PERM2-C
To ECHO/EIKT
External DEFCAR-R2
UOP
POP
DEFCAR
&
&
&
8400001B68
8300001B67
t 0
t 0
t 0
TDEFC
0.00 to 0.30s
Integral DEFCAR-R1-A
Integral DEFCAR-R1-B
Integral DEFCAR-R1-C
Integral DEFCAR-R2-A
Integral DEFCAR-R2-B
Integral DEFCAR-R2-C
Integral DEFCAR-R2-A
Figure 2.13-1 POP and UOP scheme logic
≥1
8000001B79
8100001B7A
8200001B7B
DEFCAR-OPT-A
DEFCAR-OPT-B
DEFCAR-OPT-C
DEFCAR-CS-C_POUP
DEFCAR-CS-B_POUP
DEFCAR-CS-A_POUP
&
800000EBC2 DEFCAR_F.BLOCK
810000EBC3 DEFCAR_PERMIT
1
≥1
1
≥1
&
&
&
≥1
8F00001B7C
DEFCAR-S
INT.DEFCAR-S-C
INT.DEFCAR-S-B
INT.DEFCAR-S-A
=1
=1
=1
=1
t 0
TSBCT-DEF
t 0
t 0
0.00 to 1.00s
≥1
≥1
≥1
ECHO logic
UOP
POP
DEFCAR
used for the
external carrier communication
used for the
integral carrier communication
Figure 2.13-2 Sending circuit in POP and UOP