Toshiba GR200 Series - (x) SPAR+TPAR logic - settings (TSPAR1,TTPAR1,and TRR1)

6F2S1914 (0.49)
GRL200 (Soft 033 & 037)
- 455 -
(x) SPAR+TPAR logic – settings (TSPAR1,TTPAR1,and TRR1)
The SPAR&TPAR logic for CB#1 and CB#2 is illustrated in Figure 2.34-18. As for the CB#1,
the dead timers [TSPAR1] and [TTPAR1] should be set in the coordination with the [TRR1].
ARC-S1 IN-PROG
Always ‘1’
ARC1-VCHK
From VCHK function
ARC2-VCHK
TPAR1_START
From Reclose sequence
TPAR2_START
Issuing for CB#2
ARC2_SPAR_COND
TSPAR2
t 0
0.01 – 300.00 s
&
1
8000021B63
ARC2_SPAR
Condition in CB#2
ARC2-S1 IN-PROG
SPAR2_START
800001EBB9
SPAR2_COND
800001EBBA
SPAR2_SUB_START
800001EBBB
SPAR2_SUB_COND
800001EBBC
&
&
TSPAR2_SUB
t 0
0.01 – 300.00 s
&
ARC2_TPAR_COND
TTPAR2
t 0
0.01 – 300.00 s
&
1
&
8000021B64
ARC2_TPAR
TPAR2_START
810002EBBE
TPAR2_COND
810002EBBF
TPAR2_SUB_START
810002EBC0
TPAR2_SUB_COND
810002EBC1
&
&
TTPAR2_SUB
t 0
0.01 – 300.00 s
&
From Initiation
&
Issuing for CB#1
ARC1_SPAR_COND
TSPAR1
t 0
0.01 – 300.00 s
&
1
8000011B63
ARC1_SPAR
Condition in CB#1
ARC1-S1 IN-PROG
SPAR1_START
800001EBB9
SPAR1_COND
800001EBBA
SPAR1_SUB_START
800001EBBB
SPAR1_SUB_COND
800001EBBC
&
&
TSPAR1_SUB
t 0
0.01 – 300.00 s
&
ARC1_TPAR_COND
TTPAR1
t 0
0.01 – 300.00 s
&
1
&
8000011B63
ARC1_TPAR
TPAR1_START
810001EBBD
TPAR1_COND
810001EBBE
TPAR1_SUB_START
810001EBBF
TPAR1_SUB_COND
810001EBC0
&
&
TTPAR1_SUB
t 0
0.01 – 300.00 s
&
From Initiation
&
TRR1
t 0
0.01 – 310.00 s
TRR2
t 0
0.01 – 310.00 s
To TRC
ARC1 IN-PROG
CB2_94TT
ARC2 TRR
ARC2-FT
CB1_94TT
ARC1 TRR
ARC1-FT
Figure 2.34-20 ARC1 SPAR&TPAR and ARC2 SPAR
Note: Settings [TSPAR1_SUB], [TSPAR2_SUB], [TTPAR1_SUB], [TTPAR2_SUB] are not
required as in the default.