Toshiba GR200 Series - (ii) Nodes and formulae for interlock-check

6F2S1914 (0.49)
GRL200 (Soft 033 & 037)
- 828 -
(ii) Nodes and formulae for interlock-check
Figure 4.7-4 illustrates that an interlock-check is realized by using a number of nodes. For
each node, the user is required to configure input signals, interlock-operators, and links
between nodes. Following that, an interlock-check can be run.
Node #7
OR(+)
Node #1
AND(• )
Node #3
Node #5
Node #2
Node #4
Node #6
Output
Signal monitoring point
Users can see signals at signal monitoring
points using the GR-TIEMS.
Users can see
signals by IED
screens.
OR(+)
AND(• )
AND(• )
AND(• )
OR(+)
Input A
Input B
Input C
Input D
Input E
Input F
Input G
Input H
Input I
Input J
Figure 4.7-4 Operation of interlock-check
We can see that equation (4.7-10) is a representation of Figure 4.7-4. This equation is computed
in accordance with the priority order of the interlock-operators: the first is parentheses [()], the
second is AND [•], followed by OR [+].
Output = ((A+B) •C) + (D+E•F) + (G•(H+I) •J)
(4.7-10)