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Toshiba GR200 Series - (iii) Trip delay timer in main logic

Toshiba GR200 Series
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6F2S1914 (0.49)
GRL200 (Soft 033 & 037)
- 28 -
The I
in
I
out
plane also has characteristic A and characteristic B; hence, the A and B both
are described in the following equations:


(2.2-7)


(2.2-8)
Equations (2.2-7) and (2.2-8) show the characteristic A and B, respectively. Figure 2.2-2
shows that the characteristic B. It defines the maximum outflowing current when an internal
fault occurs so that the internal fault can be detected by the characteristic B. The outflowing
current can be very much significant for the double-circuit line having three terminals or the
line having three terminals accompanying an outer loop circuit. A part of the fault current
flows out at one terminal and the other part of the fault current flows into at another terminal
depending on the fault location. The fault current flow is discussed later.
(iii) Trip delay timer in main logic
The DIFL function has a delay timer to issue a trip signal so that the DIFL function and the
other protection relays can be well organized. The delay timer, made of definite time type with
setting [TDIFL], can delay to issue a trip signal for the TRC function. The delay timer is
illustrated in Figure 2.2-3.

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