Toshiba GR200 Series - Page 52

6F2S1914 (0.49)
GRL200 (Soft 033 & 037)
- 29 -
DIFL#1
A
B
C
≥1
≥1
≥1
≥1
DIFL-CTFBlk
Non
Block-PerP
Block-3P
DIFL-EN
On
8000001C20
8100001C21
8200001C22
DIFL#2‡
A
B
C
TFC.DIFL-A_OP
From TFC
TFC.DIFL-B_OP
TFC.DIFL-C_OP
8000001B67
8100001B68
8200001B69
&
&
&
DIFLFS_OP
From Fail-safe
&
&
&
DIFL-CTF_DETECT-A
From CT Failure detection
8000021B65
8100021B66
8200021B67
DIFL-CTF_DETECT-B
DIFL-CTF_DETECT-C
≥1
≥1
≥1
EXTERNAL_DIFL_CTF
840002EBB0
8400021BB1
DIFL-TP_BLOCK
800000EBB0
8000001BB0
DIFL-INST_OP
800000EBB5
8000001BB3
≥1
&
&
&
≥1
≥1
≥1
≥1
≥1
&
&
&
0.00 to
100.00s
t 0
TDIFL
t 0
t 0
&
&
&
≥1
≥1
≥1
≥1
8000001B61
8100001B62
8300001B64
DIFL-TRIP-A
8200001B63
≥1
≥1
≥1
8000001B20
8100001B21
8200001B22
DIFL-TRIP-B
DIFL-TRIP-C
&
To TRC
DIFL-TPMD
3P
DIFL-3PTP
810000EBB6
8100001BB4
≥1
DIFL-ARCBlk
Block
DIFL-ARCBLOCK
800000EBB5
8200001BB5
≥1
DIFL-STUB-Test
On
≥1
DIFL-STUB
On
DS_OPEN
From PROT_COMMON
&
≥1
&
&
8000001B65
DIFL-ARC-BLOCK
8100001B66
DIFL-STUB-COND
DIFL-C
DIFL-A
DIFL-A
≥1
8000001B60
DIFL-OR
To Fail-safe
DIFL_BLOCK
8F0000EBB4
8F00001BB2
≥1
&
&
&
&
&
&
≥1
From COMM_APPL
RYBLK-CH1
RYBLK-CH2
≥1
RELAY BLOCK #1
RELAY BLOCK #2
Figure 2.2-3 Generation of trip signals in the DIFL function
†Note: The TRC function is discussed separately. See Chapter Relay application: Trip
circuit .
‡Note: The DIFL#2 element is designed to operate when the DIF function runs in the
dual mode using dual channel (setting [TERM_TOPOLOGY]=2Term-Dual). That is,
the DIFL#1 element operates using the data provided with the first channel
(CH1); the DIFL#2 element operates using the data provided with the second
channel (CH2). Accordingly, the difference of the transmission delays in the both
channels will be cleared, if the communication delays in the both channels vary
depending on the time and place. For more information of the mode, see chapter
Relay application: Transmission control function .