Toshiba GR200 Series - Page 488

6F2S1914 (0.49)
GRL200 (Soft 033 & 037)
- 465 -
To TRC
Always ‘1’
ARC1-VCHK
From VCHK function
ARC2-VCHK
TPAR1_START
Reclose sequence
TPAR2_START
Issuing for CB#2
TSPAR2
t 0
0.01 – 300.00 s
&
1
8000021B63
ARC2_SPAR
ARC2-S1 IN-PROG
SPAR2_START
800001EBB9
SPAR2_COND
800001EBBA
SPAR2_SUB_START
800001EBBB
SPAR2_SUB_COND
800001EBBC
&
&
TSPAR2_SUB
t 0
0.01 – 300.00 s
&
TTPAR2
t 0
0.01 – 300.00 s
&
1
&
8000021B64
ARC2_TPAR
TPAR2_START
810002EBBE
TPAR2_COND
810002EBBF
TPAR2_SUB_START
810002EBC0
TPAR2_SUB_COND
810002EBC1
&
&
TTPAR2_SUB
t 0
0.01 – 300.00 s
&
&
Issuing for CB#1
TSPAR1
t 0
0.01 – 300.00 s
&
1
8000011B63
ARC1_SPAR
ARC1-S1 IN-PROG
SPAR1_START
800001EBB9
SPAR1_COND
800001EBBA
SPAR1_SUB_START
800001EBBB
SPAR1_SUB_COND
800001EBBC
&
&
TSPAR1_SUB
t 0
0.01 – 300.00 s
&
TTPAR1
t 0
0.01 – 300.00 s
&
1
&
8000011B63
ARC1_TPAR
TPAR1_START
810001EBBD
TPAR1_COND
810001EBBE
TPAR1_SUB_START
810001EBBF
TPAR1_SUB_COND
810001EBC0
&
&
TTPAR1_SUB
t 0
0.01 – 300.00 s
&
Initiation
&
TRR1
t 0
0.01 – 310.00 s
TRR2
t 0
0.01 – 310.00 s
CB1_94TT
CB2_94TT
To TRC
ARC1-S1 TRR
ARC2 TRR
TMPAR1
t 0
0.01 – 300.00 s
&
1
8300011B66
ARC1_MPAR
MPAR1_START
830001EBC5
MPAR1_COND
830001EBC6
MPAR1_SUB_START
830001EBC7
MPAR1_SUB_COND
830001EBC8
&
&
TMPAR1_SUB
t 0
0.01 – 300.00 s
&
&
NO_MPAR_LINK
MPAR_LINK
ARC-MANOLK
FT
TPAR
SPAR&TPAR
ARC-MANOLK=FT
ARC-MANOLK=TPAR
ARC-MANOLK=S&T
&
To TRC
MPAR NO_LINK1
ARC1 FT
CB1_94TT
MPAR NO_LINK
ARC2 FT
CB2_94TT
Link judgment
TMPAR2
t 0
0.01 – 300.00 s
&
1
8300021B66
ARC2_MPAR
MPAR2_START
830002EBC6
MPAR2_COND
830002EBC7
MPAR2_SUB_START
830002EBC8
MPAR2_SUB_COND
830002EBC9
&
&
TMPAR2_SUB
t 0
0.01 – 300.00 s
&
&
TRIP-1PH
TRIP-ANYPH
TRIP-MPH
Start
&
&
&
Decision of ARC_SPAR_COND
Decision of ARC_TPAR_COND
Decision of ARC_MPAR_COND
1
ARC1 FT
ARC2 FT
SPAR scheme
TPAR scheme
MPAR scheme
SPAR scheme
TPAR scheme
MPAR scheme
TPAR scheme
ARC1_TPAR_COND
CB1_94TT
To TRC
CB2_94TT
ARC2_TPAR_COND
ARC_TPAR_COND induces three-phases tripping.
Figure 2.34-27 MPAR logic