Toshiba GR200 Series - Page 1767

Rev. and
Date
Section
(page)
Change place and contents
Approved
by
Checked by
Prepared by
June 7
June 7
June. 7
0.38
Oct. 31,2019
Chap. 2.21
Corrected incorrect signal name regarding OV-ARC-
BLOCK (Fig.2.21-4)
H. Amoh
Jul. 19
K. Oohashi
Jul. 19
T. Kaneko
Jul. 19
Chap. 2.22
Corrected incorrect signal name regarding OVS-ARC-
BLOCK (Fig.2.22-4)
H. Amoh
Jul. 19
K. Oohashi
Jul. 19
T. Kaneko
Jul. 19
Chap. 2.24
Corrected incorrect positons of logic timer and gate
regarding the output of UVBLK element (Fig. 2.24-4)
H. Amoh
Jul. 3
K.Kobayashi
Jul. 3
T. Kaneko
Jul. 2
Chap. 2.25
Corrected incorrect positons of logic timer and gate
regarding the output of UVSBLK element (Fig.2.25-4)
H. Amoh
Jul. 3
K.Kobayashi
Jul. 3
T. Kaneko
Jul. 2
Chap. 2.26
Corrected incorrect signal names regarding
FRQ/DFRQ-ARC-BLOCK (Fig.2.26-2 and 4)
H. Amoh
Jul. 19
K. Oohashi
Jul. 19
T. Kaneko
Jul. 19
Chap. 2.30
Corrected the names of the signal destination for
VTF_DETECT
H. Amoh
June 18
K. Kobayashi
June 17
T. Kaneko
June 15
Chap. 2.33
Deleted the unembedded function name (OVN) in Table
2.33-2&6 in TRC
H. Amoh
June 18
K. Kobayashi
June 17
T. Kaneko
June 15
Chap. 5.1
Added the contents about case types of ring terminals
at outline sections in Chapter Technical description
H. Amoh
Sep. 5
K. Kobayashi
Sep 3
T. Kaneko
Aug. 2
Chap. 5.3
Appendix 6
Deleted the implementation rules of COMs, added
slot address in BIO codes of Appendix Ordering
H. Amoh
Oct. 1
K. Kobayashi
Sep 30
T. Kaneko
Sep. 30
Chap. 5.4
Deleted the information of BIO4 module
H. Amoh
Sep. 5
K. Kobayashi
Sep 3
T. Kaneko
Aug. 2
Chap. 5.5
Added the information of ring terminals of PWS in
Chapter Technical description
H. Amoh
Sep. 5
K. Kobayashi
Sep 3
T. Kaneko
Aug. 2
Chap. 6.2
Revised the contents how to connect a PC with the IED
in Chapter Engineering tool
H. Amoh
Sep. 5
K. Kobayashi
Sep 3
T. Kaneko
Aug. 2
Chap. 13
Modified the name of Chapter 13 from ‘Installation and
replacement’ to ‘Installation and setting’
H. Amoh
Sep. 5
K. Kobayashi
Sep 3
T. Kaneko
Aug. 2
Chap. 13.5
Revised the contents of ring terminals w.r.t. PWS
thresholds etc. in Chapter Installation and setting
H. Amoh
Sep. 5
K. Kobayashi
Sep 3
T. Kaneko
Aug. 2
(Chap. 13.6&7)
Removed the contents about how to replace the IED
modules; transferred them for maintenance manuals
H. Amoh
Sep. 5
K. Kobayashi
Sep 3
T. Kaneko
Aug. 2
Appendix 2
Added trihedral figures for cases using ring terminals
in Appendix of Case outline
H. Amoh
Sep. 5
K. Kobayashi
Sep 3
T. Kaneko
Aug. 2
Appendix 3
Added schematic diagrams for cases using ring
terminals in Appendix of external connection
H. Amoh
Sep. 5
K. Kobayashi
Sep 3
T. Kaneko
Aug. 2
Appendix 4
Revised the contents of PIXIT based on 6F2S1875 rev
0.11
H. Amoh
Oct. 10
M. Okai
Jul. 12
T. Kaneko
Jul. 11
Appendix 6
Added ordering codes for ring terminals
H. Amoh
Sep. 5
K. Kobayashi
Sep 3
T. Kaneko
Aug. 2
Appendix 6
Added missing OVG information in Function table for
the ordering
H. Amoh
June 18
K. Kobayashi
June 17
T. Kaneko
June 15
Appendix 6
Deleted ordering codes including BIO4A, whilst added
new BIO codes: 18, 2G, 3T, 3S, 5G, 5S, 6G, 7L, 7M
H. Amoh
Oct. 10
M. Ueda
Sep. 5
T. Kaneko
Sep. 5
Appendix 7
Added cable information for ring terminals in Appendix
Technical data
H. Amoh
Sep. 5
K. Kobayashi
Sep 3
T. Kaneko
Aug. 2
(Appendix 11)
Removed rack mount information; transferred them for
maintenance manuals
H. Amoh
Sep. 5
K. Kobayashi
Sep 3
T. Kaneko
Aug. 2
Appendix 11
Added dielectric voltage test when the IED case has
ring terminals
H. Amoh
Sep. 5
K. Kobayashi
Sep 3
T. Kaneko
Aug. 2
0.39
Mar 2,2020
Chap. 2.3
Added the notice of setting [DIFGL-EN] in section
2.3.1 (v) (DIFGL).
H. Amoh
Feb. 14
K. Oohashi
Feb. 14
T. Kaneko
Feb. 13
Chap. 2.3
Added the contents about the output is blocked except
for the micro earth faults. Revise Fig. 2.3-3 (DIFGL)
H. Amoh
Feb. 20
K. Oohashi
Feb. 20
T. Kaneko
Aug. 20
Chap. 2.10
Corrected the logic of [Z*-LEBLK] switches in ZS and
ZG scheme logics Fig 2.10-37~41 and45~50
H. Amoh
Feb. 27
K. Kobayashi
Feb. 20
T. Kaneko
Feb. 6