Enhanced Serial Communication Interface (eSCI)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 21-5
Table 21-3. ESCIx_CR1 Field Descriptions
Field Description
0–2 Reserved.
3–15
SBRn
SCI baud rate. Used by the counter to determine the baud rate of the eSCI. The formula for calculating the baud
rate is:
where BR is the content of the eSCI control register 1 (ESCIx_CR1), bits SBR0–SBR12. SBR0–SBR12 can contain
a value from 1 to 8191. Refer to the ESCIx_LCR[WU] bit description on page 21-12.
16
LOOPS
Loop select. Enables loop operation. In loop operation, the RXD pin is disconnected from the eSCI and the
transmitter output is internally connected to the receiver input. Both the transmitter and the receiver must be enabled
to use the loop function.
0 Normal operation enabled, loop operation disabled
1 Loop operation enabled
Note: The receiver input is determined by the RSRC bit.
17 Reserved.
18
RSRC
Receiver source. When LOOPS = 1, the RSRC bit determines the source for the receiver shift register input.
0 Receiver input internally connected to transmitter output
1 Receiver input connected externally to transmitter
The table below shows how LOOPS and RSRC determine the loop function of the eSCI.
19
M
Data format mode. Determines whether data characters are 8 or 9 bits long.
0 1 start bit, 8 data bits, 1 stop bit
1 1 start bit, 9 data bits, 1 stop bit
20
WAKE
Wake-up condition. Determines which condition wakes up the eSCI: a logic 1 (address mark) in the most significant
bit (MSB) position of a received data character or an idle condition on the RXD.
0 Idle line wake-up
1 Address mark wake-up
Note: This is not a wake-up from a power-save mode; this function applies to the receiver standby mode only.
21
ILT
Idle line type. Determines when the receiver starts counting logic 1s as idle character bits. The counting begins
either after the start bit or after the stop bit. If the count begins after the start bit, then a string of logic 1s preceding
the stop bit can cause false recognition of an idle character. Beginning the count after the stop bit avoids false idle
character recognition, but requires properly synchronized transmissions.
0 Idle character bit count begins after start bit
1 Idle character bit count begins after stop bit
22
PE
Parity enable. Enables the parity function. When enabled, the parity function inserts a parity bit in the most
significant bit position of the transmitted word. During reception, the received parity bit is verified in the most
significant bit position. The received parity bit is not masked out.
0 Parity function disabled
1 Parity function enabled
SCI baud rate
eSCI system clock
16 BR×
-------------------------------------------------=
LOOPS RSRC Function
0 – Normal operation
1 0 Loop mode with RXD input internally connected to TXD output
1 1 Single-wire mode with RXD input connected to TXD
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