Deserial Serial Peripheral Interface (DSPI)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 20-19
20.3.2.4 DSPI Status Register (DSPIx_SR)
The DSPIx_SR contains status and flag bits. The bits are set by the hardware and reflect the status of the
DSPI and indicate the occurrence of events that can generate interrupt or DMA requests. Software can
clear flag bits in the DSPIx_SR by writing a 1 to clear it (w1c). Writing a 0 to a flag bit has no effect.
28–31
BR[0:3]
Baud rate scaler. Selects the scaler value for the baud rate. Use in master mode only. The pre-scaled system clock
is divided by the baud rate scaler to generate the frequency of the SCK. The following table lists the baud rate scaler
values.
The baud rate is computed using the following equation:
Note: See Section 20.4.6.1, “Baud Rate Generator,” for more details.
Address: Base + 0x002C Access: R/W
0 1 2 3 4 5 6 7 8 9 101112131415
R TCF TXRXS 0 EOQF TFUF 0 TFFF 0 0 0 0 0 RFOF 0 RFDF 0
W
w1c w1c w1c w1c w1c w1c
Reset0000001000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R TXCTR TXNXTPTR RXCTR POPNXTPTR
W
Reset0000000000000000
Figure 20-6. DSPI Status Register (DSPIx_SR)
Table 20-5. DSPIx_CTARn Field Description (continued)
Field Description
BR Value
Baud Rate
Scaler Value
BR Value
Baud Rate
Scaler Value
0000 2 1000 256
0001 4 1001 512
0010 6 1010 1024
0011 8 1011 2048
0100 16 1100 4096
0101 32 1101 8192
0110 64 1110 16384
0111 128 1111 32768
SCK baud rate
f
SYS
PBRPrescalerValue
----------------------------------------------------------
1DBR+
BRScalerValue
--------------------------------------------
×=
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