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NXP Semiconductors MPC5566 - Pad Configuration Register 102 (SIU_PCR102)

NXP Semiconductors MPC5566
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System Integration Unit (SIU)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 6-57
Refer to Table 6-19 for bit field definitions. Table 6-67 lists the PA fields for
PCSA[5]_PCSB[3]_GPIO[101].
6.3.1.68 Pad Configuration Register 102 (SIU_PCR102)
The SIU_PCR102 register controls the function, direction, and electrical attributes of
SCKB_PCSC[1]_GPIO[102].
Figure 6-69. SCKB_PCSC[1]_GPIO[102] Pad Configuration Register (SIU_PCR102)
Refer to Table 6-19 for bit field definitions. Table 6-68 lists the PA fields for SCKB_PCSC[1]_GPIO[102].
Table 6-67. PCR101 PA Field Definitions
PA Field Pin Function
0b00 GPIO[101]
0b01 PCSA[5]
0b10 PCSB[3]
0b11 PCSA[5]
Address: Base + 0x010C Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0
PA OBE
1
1
When configured as SCKB or PCSC[1], the OBE bit has no effect. When configured as GPDO, set the OBE bit to 1.
IBE
2
2
When the pad is configured as an output, set the IBE bit to 1 to show the pin state in the GPDI register.
Clear the IBE bit to 0 to reduce power consumption. When configured as GPDI, set the IBE bit to 1.
0 0
ODE HYS SRC WPE WPS
W
RESET: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1
Table 6-68. PCR102 PA Field Definitions
PA Field Pin Function
0b00 GPIO[102]
0b01 SCKB
0b10 PCSC[1]
0b11 SCKB

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