NXP Semiconductors MPC5566 - Pad Configuration Register 68 (SIU_PCR68)

System Integration Unit (SIU)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 6-41
Refer to Table 6-19 for bit field definitions. Table 6-46 lists the PA fields for WE/BE[2:3]_GPIO[66:67].
6.3.1.41 Pad Configuration Register 68 (SIU_PCR68)
The SIU_PCR68 register controls the function, direction, and electrical attributes of the OE_GPIO[68].
Figure 6-42. OE_GPIO[68] Pad Configuration Register (SIU_PCR68)
Refer to Table 6-19 for bit field definitions. Table 6-46 lists the PA fields for OE_GPIO[68].
6.3.1.42 Pad Configuration Register 69 (SIU_PCR69)
The SIU_PCR69 register controls the function, direction, and electrical attributes of the TS_GPIO[69].
Figure 6-43. TS_GPIO[69] Pad Configuration Register (SIU_PCR69)
Table 6-41. PCR66–PCR67 PA Field Definition
PA Field Pin Function
0b0 GPIO[66:67]
0b1 WE/BE[2:3]
Address: Base + 0x00C8 Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0
PA OBE
1
1
When configured as OE, the OBE bit has no effect. When configured as GPDO, set the OBE bit to 1.
IBE
2
2
When the pad is configured as an output, set the IBE bit to 1 to show the pin state in the GPDI register.
Clear the IBE bit to 0 to reduce power consumption. When configured as GPDI, set the IBE bit to 1.
DSC ODE
3
3
When configured as OE, clear the ODE bit to 0.
HYS
4
4
When EBI is enabled, clear the HYS bit to 0.
0 0
WPE
5
5
Refer to the EBI section for weak pullup settings when configured as OE.
WPS
5
W
RESET: 0 0 0 0 0 0 0 0 1 1 0 0 0 0 1 1
Table 6-42. PCR68 PA Field Definition
PA Field Pin Function
0b0 GPIO[68]
0b1 OE
Address: Base + 0x00CA Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0
PA OBE
1
1
When configured as TS, the OBE bit has no effect. When configured as GPDO, set the OBE bit to 1.
IBE
2
2
When the pad is configured as an output, set the IBE bit to 1 to show the pin state in the GPDI register.
Clear the IBE bit to 0 to reduce power consumption. When configured as GPDI, set the IBE bit to 1.
DSC ODE
3
3
When configured as TS, clear the ODE bit to 0.
HYS
4
4
When EBI is enabled, clear the HYS bit to 0.
0 0
WPE
5
5
Refer to the EBI section for weak pullup settings when configured as TS.
WPS
5
W
RESET: 0 0 0 0 0 0 0 0 1 1 0 0 0 0 1 1