NXP Semiconductors MPC5566 - Modulus Counter Mode (MC)

Enhanced Modular Input/Output Subsystem (eMIOS)
MPC5566 Microcontroller Reference Manual, Rev. 2
17-44 Freescale Semiconductor
Figure 17-31 shows how the unified channel can be used to accumulate high time.
Figure 17-31. Windowed Programmable Time Accumulation Example
17.4.4.4.11 Modulus Counter Mode (MC)
The following table lists the modulus counter settings:
Table 17-23. Modulus Counter Operating Modes
MODE[0:6] Unified Channel MC Operating Mode
0b0010000 Modulus counter. Up counter, internal clock source.
0b0010001 Modulus counter. Up counter, external clock source.
0b0010010–0b0010011 Reserved
0b0010100 Modulus counter. Up/down counter, no change in counter direction upon
match of input counter and register B1, internal clock source.
0b0010101 Modulus counter. Up/down counter, no change in counter direction upon
match of input counter and register B1, external clock source.
A1 match
Selected
counter bus
0x000100 0x000100 0x003000
B1 Value
3
0x001500 0x0042000x001500
0xFFFFFF
Time
FLAG
set event
EDPOL = 1
B1 match
A1 Value
2
Notes:
1
After input filter.
2
Writing EMIOS_CADRn writes to A1.
3
Writing EMIOS_CBDRn writes to B1.
Time
0x000000
Input signal
1
B1 match
A1 and B1
Write
0x003000
0x004200
A1 and B1
Write
A1 match
accumulator
(EMIOS_CCNTR)
0x000100 0x0042000x001500 0x003000
4
Reading EMIOS_ALTAn returns the value of A2. (EMIOS_ALTA only used in PEC and WPTA modes)
A2 Value
4
EMIOS_CCNTRn A2EMIOS_CCNTRn A2