Flash Memory
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 13-31
NOTE
Lock and Select are independent. If a block is selected and locked, no erase
occurs. Refer to Section 13.3.2.2, “Low/Mid Address Space Block Locking
Register (FLASH_LMLR), Section 13.3.2.3, “High Address Space Block
Locking Register (FLASH_HLR)” and Section 13.3.2.4, “Secondary
Low/Mid Address Space Block Locking Register (FLASH_SLMLR)” for
more information.
3. Write to any address in flash. This is referred to as an erase interlock write.
4. Write a logic 1 to the FLASH_MCR[EHV] bit to start an internal erase sequence or skip to step 9
to terminate.
5. Wait until the FLASH_MCR[DONE] bit goes high.
6. Confirm FLASH_MCR[PEG] = 1.
7. Write a logic 0 to the FLASH_MCR[EHV] bit.
8. If more blocks are to be erased, return to step 2.
9. Write a logic 0 to the FLASH_MCR[ERS] bit to terminate the erase.
The erase sequence is presented graphically in Figure 13-15. The erase suspend operation detailed in
Figure 13-15 is discussed in section Section 13.4.2.4.1, “Flash Erase Suspend/Resume.”
After settingFLASH_MCR[ERS], one write, referred to as an interlock write, must be performed before
FLASH_MCR[EHV] can be set to a 1. Data words written during erase sequence interlock writes are
ignored. The user can terminate the erase sequence by clearing FLASH_MCR[ERS] before setting
FLASH_MCR[EHV].
An erase operation can be aborted by clearing FLASH_MCR[EHV] assuming FLASH_MCR[DONE] is
low, FLASH_MCR[EHV] is high and FLASH_MCR[ESUS] is low. An erase abort forces the module to
step 8 of the erase sequence. An aborted erase results in FLASH_MCR[PEG] being set low, indicating a
failed operation. The blocks being operated on before the abort contain indeterminate data. The user
cannot abort an erase sequence while in erase suspend.
WARNING
Aborting an erase operation leaves the flash core blocks being erased in an
indeterminate data state. This can be recovered by executing an erase on the
affected blocks.
13.4.2.4.1 Flash
Erase Suspend/Resume
The erase sequence can be suspended to allow read access to the flash core. The erase sequence can also
be suspended to program (erase-suspended program) the flash core. A program started during erase
suspend can in turn be suspended. Only one erase suspend and one program suspend are allowed at a time
during an operation. It is not possible to erase during an erase suspend, or program during a program
suspend. During suspend, all reads to flash core locations targeted for program and blocks targeted for
erase return indeterminate data. Programming locations in blocks targeted for erase during
erase-suspended program can result in corrupted data.
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