NXP Semiconductors MPC5566 - Pad Configuration Register 225-224 (SIU_PCR225-SIU_PCR224)

System Integration Unit (SIU)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 6-95
6.3.1.128 Pad Configuration Register 225–224 (SIU_PCR225–SIU_PCR224)
The SIU_PCR225–SIU_PCR224 registers control the drive strength of MSEO[1:0].
Figure 6-129. MSEO[1:0] Pad Configuration Register (SIU_PCR225–SIU_PCR224)
6.3.1.129 Pad Configuration Register 226 (SIU_PCR226)
The SIU_PCR226 register controls the drive strength of RDY.
Figure 6-130. RDY Pad Configuration Register (SIU_PCR226)
6.3.1.130 Pad Configuration Register 227 (SIU_PCR227)
The SIU_PCR227 register controls the drive strength of EVTO.
Figure 6-131. EVTO Pad Configuration Register (SIU_PCR227)
6.3.1.131 Pad Configuration Register 228 (SIU_PCR228)
The SIU_PCR228 register controls the drive strength of TDO.
Figure 6-132. TDO Pad Configuration Register (SIU_PCR228)
Address: Base + (0x0202–0x0200) Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0 0 0 0
DSC
0 0 0 0 0 0
W
RESET: 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0
Address: Base + 0x0204 Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0 0 0 0
DSC
0 0 0 0 0 0
W
RESET: 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0
Address: Base + 0x0206 Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0 0 0 0
DSC
0 0 0 0 0 0
W
RESET: 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0
Address: Base + 0x0208 Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0 0 0 0
DSC
0 0 0 0 0 0
W
RESET: 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0