NXP Semiconductors MPC5566 - Etpu Engine Configuration Register (ETPU_ECR)

Enhanced Time Processing Unit (eTPU)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 18-23
18.4.3.5 eTPU Engine Configuration Register (ETPU_ECR)
Each engine has its own ETPU_ECR. The ETPU_ECR holds configuration and status fields that are
programmed independently in each engine.
Address: Base + 0x0000_0010 Access: R/W
0123456789101112131415
R
ETPUSCMOFFDATAR[0:15]
W
Reset1111001101110111
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
ETPUSCMOFFDATAR[16:31]
W
Reset0101111111111011
Figure 18-8. eTPU SCM Off-Range Data Register (ETPU_SCMOFFDATAR)
Table 18-9. ETPU_SCMOFFDATAR Field Descriptions
Field Description
0–31
ETPU
SCMOFF
DATA
SCM Off-range read data value.
Address: Base + 0x0000_0014 (eTPU A)
Address: Base + 0x0000_0018 (eTPU B)
Access: R/W
0123456789101112131415
R
FEND MDIS
0STF0000HLTF0000
FPSCK
W
Reset0000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
CDFC
000000000
ETB
W
Reset0000000000000000
Figure 18-9. eTPU Engine Configuration Register (ETPU_ECR)