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NXP Semiconductors MPC5566 - Port Configuration Register (PCR)

NXP Semiconductors MPC5566
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Nexus
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 25-15
25.6.2.4 Port Configuration Register (PCR)
The PCR, shown in Figure 25-4, is used to select the NPC mode of operation, enable MCKO and select
the MCKO frequency, and enable or disable MCKO gating. This register must be configured as soon as
the NPC is enabled.
NOTE
The mode (MCKO_GT) or clock division (MCKO_DIV) bits must not be
modified after MCKO has been enabled. Changing the mode or clock
division while MCKO is enabled can produce unpredictable results.
Reg Index: 0 Access: User R/O
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R Part Revision Number Design Center Part Identification Number
W
Reset0000100000010110
1514131211109876543210
R Part Identification
Number (continued)
Manufacturer Identity Code 1
W
Reset0110000000011101
Figure 25-3. Nexus Device ID Register (DID)
Table 25-10. DID Register Field Descriptions
Field Description
31–28
PRN
Part revision number. Contains the revision number of the part. This field changes with each revision of
the device or module.
27–22
DC
Design center. Indicates the Freescale design center. This value is 0x20.
21–12
PIN
Part identification number. Contains the part number of the device. The PIN for the MPC5566 is 0x166.
11–1
MIC
Manufacturer identity code. Contains the reduced Joint Electron Device Engineering Council (JEDEC) ID
for Freescale, 0xE.
0 Fixed per JTAG 1149.1 Always set to 1.

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