Error Correction Status Module (ECSM)
MPC5566 Microcontroller Reference Manual, Rev. 2
8-10 Freescale Semiconductor
The data captured on a multi-bit non-correctable ECC error is undefined.
8.2.1.10 Flash ECC Data Low Registers (ECSM_FEDRL)
The ECSM_FEDRH and ECSM_FEDRL are 32-bit registers for capturing the data of the last,
correctly-enabled ECC event in the flash memory. Depending on the state of the ECSM_ECR, an ECC
event in the flash loads the address, attributes and data of the access into the ECSM_FEAR,
ECSM_FEMR, ECSM_FEAT and ECSM_FEDR registers, and asserts the FNCE flag in ECSM_ESR.
Base + 0x0058 Access: Read
0123456789101112131415
RFEDH
W
Reset
1
UUUUUUUUUUUUUUUU
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
RFEDH
W
Reset
1
UUUUUUUUUUUUUUUU
1
“U” signifies a bit that is uninitialized.
Figure 8-7. Flash ECC Data High Register (ECSM_FEDRH)
Table 8-8. ECSM_FEDRH Field Descriptions
Field Description
0–31
FEDH
[0:31]
Flash ECC data. Contains the data associated with the faulting access of the last, correctly-enabled flash ECC event.
The register contains the data value taken directly from the data bus. The reset value of this field is undefined.
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